The present invention relates to semiconductor devices, and more specifically, to interconnect structures in semiconductor devices.
Generally, semiconductor devices include a plurality of circuits that form an integrated circuit (IC) fabricated on a semiconductor substrate. A complex network of signal paths is routed to connect the circuit elements distributed on the surface of the substrate. To efficiently route these signals across the device, multilevel or multilayered schemes are used, for example, single or dual damascene wiring structures. The wiring structure may include, for example, copper or a copper alloy. Copper-based interconnects may provide higher speed signal transmission between large numbers of transistors on a complex semiconductor chip than other types of interconnects, for example, aluminum-based interconnects.
Within an interconnect structure, metal vias run substantially normal to the semiconductor substrate. Metal lines run substantially parallel to the semiconductor substrate. The signal speed may be enhanced, and “crosstalk” between signals in adjacent lines may be reduced, by embedding the metal lines and metal vias (e.g., conductive features) within a low-k dielectric material.